Operating systems · interactive
Virtual memory and paging
Every address a program uses is virtual. The CPU splits it into a page number and an offset, then translates the page to a physical frame: first via the TLB cache, then the page table. If the page isn't in RAM at all, the OS fetches it.
- 0x1a2c
- 0x1ff0
- 0x3004
- 0x0100
- 0x1234
- 0x5008
- 0x3abc
- 0x0200
TLB (2 entries)
- page 1 → frame 1
- —
Page table
- page 0: frame 2
- page 1: frame 1
- page 2: on disk
- page 3: frame 0
- page 4: on disk
- page 5: on disk
RAM (3 frames)
- frame 0: page 3
- frame 1: page 1
- frame 2: page 0
Pages are 4 KB, so the low 12 bits are the offset and the rest is the page number.
0x1a2c → 0x1a2c. Page 1 isn't in memory: page fault. The OS loads it from disk into frame 1. Slow: milliseconds.
Split the address
High bits pick the page, low bits are the offset within it. Only the page number gets translated.
0x1a2c → page 1, offset 0xa2c
TLB: a tiny translation cache
Recent translations live in the CPU. A hit costs almost nothing; programs that touch nearby memory hit it constantly.
Locality is why arrays beat linked lists.
Walk the page table
The OS-maintained table maps pages to frames. Each process has its own, which is what isolates processes from each other.
Real tables have several levels.
Page fault: fetch from disk
The OS picks a frame (evicting another page if RAM is full), loads the page and retries. Too many faults is thrashing.
Here eviction is first-in, first-out; real kernels approximate LRU.
In production
Tools and technologies
Every modern OS and CPU translates addresses this way.
Not tied to one language — use these names when you search docs or design a system.